SCAN12100 Datasheet | National Semiconductor

Description The SCAN12100 is a 1228.8 and 614.4 Mbps serializer/deseralizer (Ser Des) for high-speed bidirectional serial data transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. The SCAN12100 integrates precision delay calibration measurement (DCM) circuitry that measures link delay ponents to better than ± 800 ps accuracy. The SCAN12100 features independent transmit and receive PLLs, on-chip oscillator, and intelligent clock management circuitry to automatically perform remote radio head synchronization and reduce the cost and plexity of external clock networks. The SCAN12100 is programmable though an MDIO interface as well as through pins, featuring configurable transmitter deemphasis, receiver equalization, speed rate selection, internal pattern generation/verification, and loop back modes. In addition to at-speed BIST, the SCAN12100 includes IEEE 1149.1 and 1149.6 testability. Note: For a full SCAN12100 datasheet please contact your local National Semiconductor representitive - DCM also measures chip and other delays to ≤ ± 1200 ps - - - - - - - - - - - accuracy Deterministic chip latency Automatic receiver lock and RE synchronization without reference clock or external crystal Independent transmit and receive PLLs for seamless RE synchronization Low noise recovered clock output Requires no jitter cleaning in single-hop applications >8 k V ESD on the CML IO, >7 k V on all other pins, >2 k V CDM Hot plug protection LOS, LOF, 8b/10b line code violation, ma, and receiver PLL lock reporting Programmable hyperframe length and start of hyperframe character Programmable transmit de-emphasis and receive equalization with on-chip termination Advanced testability features - IEEE 1149.1 and 1149.6 - At-speed BIST pattern generator/verifier - Multiple loopback modes 1.8V or 3.3V patible parallel bus interface 100-pin TQFP package with exposed dap Industrial - 40 to +85° C temperature range Features - - - - Exceeds LV and HV CPRI...